Since baseband processors for Multiple Input and Multiple Output (MIMO) equalization require high throughput and high flexibility, a parallel MIMO detector was proposed for 3GPP-LTE standard based on Software Defined Radio (SDR) methodology, which adopted Single Instruction Multiple Data (SIMD) and Very Long Instruction Word (VLIW) technology to exploit the parallelism on both inter-tone and inner-tone MIMO equalization. Each SIMD lane supported both 16 bit fixed-point and 20 bit floating-point complex vector and matrix operations, met the requirements of power, processing delay and precision for different MIMO configurations. The experimental results show that the proposed MIMO detector is much more efficient and 4×4 matrix inversion rate is up to 95 MInversion/s, which satisfies the requirement of 3GPP-LTE standard. Besides, its programmability and configurability support different algorithms of MIMO equalization.